osom_asm_x86_64/models/
instruction.rs

1#![allow(non_camel_case_types)]
2
3use core::num::NonZero;
4
5use super::{Condition, GPR, Immediate, Label, Memory};
6
7/// Represents custom assembly language instructions.
8#[derive(Debug, Clone, PartialEq, Eq, Hash)]
9#[must_use]
10#[repr(u16)]
11pub enum Instruction {
12    /// `nop` extended to specified `length`
13    Nop { length: NonZero<u32> } = 1, // We start from 1 because we want Option<Instruction> to be optimized.
14
15    /// Pseudoinstruction: sets label at current position.
16    /// "Private" means that the label won't be visible
17    /// outside the compiled code.
18    SetPrivate_Label { label: Label },
19
20    /// Pseudoinstruction: sets label at current position.
21    /// "Public" means that the label will be visible
22    /// and reachable from outside the compiled code.
23    SetPublic_Label { label: Label },
24
25    /// `ret`
26    Ret,
27
28    /// `mov reg, imm64`
29    ///
30    /// # Notes
31    /// The only instruction that uses 64-bit immediate.
32    Mov_RegImm64 { dst: GPR, src: super::Immediate64 },
33
34    /// `mov reg, imm`
35    Mov_RegImm { dst: GPR, src: Immediate },
36
37    /// `mov [mem], imm`
38    Mov_MemImm { dst: Memory, src: Immediate },
39
40    /// `mov reg, reg`
41    Mov_RegReg { dst: GPR, src: GPR },
42
43    /// `mov [mem], reg`
44    Mov_MemReg { dst: Memory, src: GPR },
45
46    /// `mov reg, [mem]`
47    Mov_RegMem { dst: GPR, src: Memory },
48
49    /// `add reg, imm`
50    Add_RegImm { dst: GPR, src: Immediate },
51
52    /// `add [mem], imm`
53    Add_MemImm { dst: Memory, src: Immediate },
54
55    /// `add reg, reg`
56    Add_RegReg { dst: GPR, src: GPR },
57
58    /// `add [mem], reg`
59    Add_MemReg { dst: Memory, src: GPR },
60
61    /// `add reg, [mem]`
62    Add_RegMem { dst: GPR, src: Memory },
63
64    /// `sub reg, imm`
65    Sub_RegImm { dst: GPR, src: Immediate },
66
67    /// `sub [mem], imm`
68    Sub_MemImm { dst: Memory, src: Immediate },
69
70    /// `sub reg, reg`
71    Sub_RegReg { dst: GPR, src: GPR },
72
73    /// `sub [mem], reg`
74    Sub_MemReg { dst: Memory, src: GPR },
75
76    /// `sub reg, [mem]`
77    Sub_RegMem { dst: GPR, src: Memory },
78
79    /// `xor reg, imm`
80    Xor_RegImm { dst: GPR, src: Immediate },
81
82    /// `xor [mem], imm`
83    Xor_MemImm { dst: Memory, src: Immediate },
84
85    /// `xor reg, reg`
86    Xor_RegReg { dst: GPR, src: GPR },
87
88    /// `xor [mem], reg`
89    Xor_MemReg { dst: Memory, src: GPR },
90
91    /// `xor reg, [mem]`
92    Xor_RegMem { dst: GPR, src: Memory },
93
94    /// Pseudoinstruction: jumps to label.
95    Jump_Label { dst: Label },
96
97    /// `jmp reg`
98    Jump_Reg { dst: GPR },
99
100    /// `jmp [mem]`
101    Jump_Mem { dst: Memory },
102
103    /// Pseudoinstruction: calls label.
104    Call_Label { dst: Label },
105
106    /// `call reg`
107    Call_Reg { dst: GPR },
108
109    /// `call [mem]`
110    Call_Mem { dst: Memory },
111
112    /// Pseudoinstruction: conditionally jumps to label.
113    CondJump_Label { condition: Condition, dst: Label },
114}
osom_asm_x86_64/models/instruction.rs

osom_asm_x86_64/models/
instruction.rs
